Delay to 1st Tap | 75ns |
---|---|
Total Delay-Nom (td) | 75 ns |
Surface Mount | NO |
Terminal Finish | MATTE TIN |
Function | Multiple, NonProgrammable |
Height Seated (Max) | 4.572mm |
Terminal Position | DUAL |
Package / Case | 14-DIP (0.300, 7.62mm) |
Number of Taps/Steps | 1 |
Technology | CMOS |
JESD-30 Code | R-PDIP-T14 |
Voltage - Supply | 4.75V~5.25V |
Number of Terminations | 14 |
Supply Voltage-Max (Vsup) | 5.25V |
Supply Voltage | 5V |
Width | 7.62mm |
Qualification Status | Not Qualified |
RoHS Status | ROHS3 Compliant |
Moisture Sensitivity Level (MSL) | 1 (Unlimited) |
Programmable Delay Line | NO |
Output Polarity | TRUE |
Operating Temperature | 0°C~70°C |
Supply Voltage-Min (Vsup) | 4.75V |
Number of Independent Delays | 3 |
Mounting Type | Through Hole |
JESD-609 Code | e3 |
Logic IC Type | SILICON DELAY LINE |
Time@Peak Reflow Temperature-Max (s) | NOT SPECIFIED |
Peak Reflow Temperature (Cel) | 260 |
Length | 19.05mm |
Packaging | Tube |
Part Status | Obsolete |
Family | CMOS |
Published | 1999 |
Terminal Pitch | 2.54mm |
Base Part Number | DS1013 |