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| Clock Frequency | 717MHz |
|---|---|
| Surface Mount | YES |
| Terminal Finish | Tin/Silver/Copper (Sn/Ag/Cu) |
| Height Seated (Max) | 3.5mm |
| Terminal Position | BOTTOM |
| Package / Case | 780-BBGA |
| Technology | CMOS |
| JESD-30 Code | S-PBGA-B780 |
| Voltage - Supply | 1.15V~1.25V |
| Number of Inputs | 534 |
| Terminal Form | BALL |
| Number of Terminations | 780 |
| Supply Voltage | 1.2V |
| ECCN Code | 3A001.A.7.A |
| Number of Logic Elements/Cells | 132540 |
| Width | 29mm |
| Qualification Status | Not Qualified |
| RoHS Status | RoHS Compliant |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) |
| Operating Temperature | 0°C~85°C TJ |
| HTS Code | 8542.39.00.01 |
| Total RAM Bits | 6747840 |
| Number of LABs/CLBs | 6627 |
| Number of I/O | 534 |
| Mounting Type | Surface Mount |
| JESD-609 Code | e1 |
| Power Supplies | 1.21.5/3.33.3V |
| Factory Lead Time | 8 Weeks |
| Number of Outputs | 526 |
| Time@Peak Reflow Temperature-Max (s) | 40 |
| Peak Reflow Temperature (Cel) | 245 |
| Series | Stratix® II |
| Programmable Logic Type | FIELD PROGRAMMABLE GATE ARRAY |
| Length | 29mm |
| Subcategory | Field Programmable Gate Arrays |
| Packaging | Tray |
| Part Status | Active |
| Published | 2011 |
| Terminal Pitch | 1mm |
| Base Part Number | EP2S130 |
| Combinatorial Delay of a CLB-Max | 5.117 ns |
Intel / Altera
FPGA Stratix® II Family 132540 Cells 609.76MHz 90nm Technology 1.2V 1020-Pin FC-FBGA
Intel / Altera
FPGA Stratix II Family 132540 Cells 609.76MHz 90nm (CMOS) Technology 1.2V 1020-Pin FCFBGA
